FPGA Engineer [Tel-Aviv / Amsterdam]
We are looking for an exceptional FPGA developer to join our team.
Our FPGA team is responsible for implementing ultra-low latency (ULL) algo trading transactions, while working side by side with traders and mathematicians interacting with worldwide exchanges.
Our dynamic and ever-changing workplace encourages innovation and problem-solving skills.
- At least 3 years of experience as an FPGA/ASIC designer.
- Verilog, System Verilog and VHDL.
- HFT architecture.
- Place & route, timing analysis, chip scope, high performance coding and optimization area.
- LAB bring up.
- Familiarity with logic simulation and debug environments.
- A team player with the ability to work independently.
- Interest in financial markets.
- Experience with industry’s standard protocols (i.e. PCI Express, USB, Ethernet).
- Scripting and programming skills in various languages such as C/C++, Python, TCL, PERL.